AMD Achieves First TSMC N2 Product Silicon Milestone
AMD (NASDAQ: AMD) has achieved a significant milestone as its next-generation AMD EPYC processor, codenamed 'Venice,' becomes the first HPC product to be taped out and brought up on TSMC's advanced 2nm (N2) process technology. This achievement demonstrates the strong partnership between AMD and TSMC in semiconductor manufacturing, combining new design architectures with cutting-edge process technology.
The company has also successfully completed the bring up and validation of its 5th Gen AMD EPYC CPU products at TSMC's new fabrication facility in Arizona, reinforcing AMD's commitment to U.S. manufacturing. The 'Venice' processor is scheduled to launch next year, marking a significant advancement in AMD's data center CPU roadmap.
AMD (NASDAQ: AMD) ha raggiunto un traguardo importante con il suo processore di nuova generazione AMD EPYC, nome in codice 'Venice', che diventa il primo prodotto HPC a essere progettato e realizzato con la tecnologia di processo avanzata a 2nm (N2) di TSMC. Questo risultato dimostra la solida collaborazione tra AMD e TSMC nella produzione di semiconduttori, unendo nuove architetture di design a tecnologie di processo all'avanguardia.
L'azienda ha inoltre completato con successo l'avvio e la validazione dei suoi prodotti 5陋 generazione di CPU AMD EPYC presso il nuovo stabilimento di TSMC in Arizona, rafforzando l'impegno di AMD nella produzione negli Stati Uniti. Il processore 'Venice' 猫 previsto per il lancio il prossimo anno, segnando un importante avanzamento nella roadmap delle CPU per data center di AMD.
AMD (NASDAQ: AMD) ha alcanzado un hito significativo con su procesador de pr贸xima generaci贸n AMD EPYC, con nombre en clave 'Venice', que se convierte en el primer producto HPC dise帽ado y fabricado con la tecnolog铆a de proceso avanzada de 2nm (N2) de TSMC. Este logro demuestra la s贸lida colaboraci贸n entre AMD y TSMC en la fabricaci贸n de semiconductores, combinando nuevas arquitecturas de dise帽o con tecnolog铆a de proceso de vanguardia.
La compa帽铆a tambi茅n ha completado con 茅xito la puesta en marcha y validaci贸n de sus productos CPU AMD EPYC de 5陋 generaci贸n en la nueva planta de fabricaci贸n de TSMC en Arizona, reforzando el compromiso de AMD con la producci贸n en Estados Unidos. El procesador 'Venice' est谩 programado para lanzarse el pr贸ximo a帽o, marcando un avance importante en la hoja de ruta de CPUs para centros de datos de AMD.
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霕愴暅, AMD電� TSMC鞚� 鞎犽Μ臁半倶 鞁犼窚 鞝滌“ 鞁滌劋鞐愳劀 5靹鸽寑 AMD EPYC CPU 鞝滍拡鞚� 齑堦赴 臧�霃� 氚� 瓴�歃濎潉 靹标车鞝侅溂搿� 鞕勲頃橃棳 氙戈淡 雮� 鞝滌“鞐� 雽�頃� AMD鞚� 鞚橃毳� 臧曧檾頄堨姷雼堧嫟. 'Venice' 頂勲靹胳劀電� 雮措厔鞐� 於滌嫓霅� 鞓堨爼鞚措┌, AMD鞚� 雿办澊韯� 靹柬劙 CPU 搿滊摐毵奠棎 欷戩殧頃� 歆勳爠鞚� 鞚橂頃╇媹雼�.
AMD (NASDAQ : AMD) a franchi une 茅tape importante avec son processeur de nouvelle g茅n茅ration AMD EPYC, nomm茅 'Venice', qui devient le premier produit HPC con莽u et fabriqu茅 avec la technologie de proc茅d茅 avanc茅e 2nm (N2) de TSMC. Cette r茅ussite illustre le partenariat solide entre AMD et TSMC dans la fabrication de semi-conducteurs, alliant de nouvelles architectures de conception 脿 une technologie de proc茅d茅 de pointe.
L'entreprise a 茅galement men茅 脿 bien la mise en service et la validation de ses produits CPU AMD EPYC de 5e g茅n茅ration dans la nouvelle usine de fabrication de TSMC en Arizona, renfor莽ant ainsi l'engagement d'AMD envers la production aux 脡tats-Unis. Le processeur 'Venice' est pr茅vu pour un lancement l'ann茅e prochaine, marquant une avanc茅e majeure dans la feuille de route des CPU pour centres de donn茅es d'AMD.
AMD (NASDAQ: AMD) hat einen bedeutenden Meilenstein erreicht, indem sein n盲chstgenerations AMD EPYC Prozessor mit dem Codenamen 'Venice' als erstes HPC-Produkt mit TSMCs fortschrittlicher 2nm (N2) Prozess-Technologie entworfen und gefertigt wurde. Dieser Erfolg zeigt die starke Partnerschaft zwischen AMD und TSMC in der Halbleiterfertigung, die neue Designarchitekturen mit modernster Prozesstechnologie verbindet.
Das Unternehmen hat au脽erdem die Inbetriebnahme und Validierung seiner 5. Generation AMD EPYC CPUs in der neuen Fertigungsanlage von TSMC in Arizona erfolgreich abgeschlossen und damit AMDs Engagement f眉r die Fertigung in den USA unterstrichen. Der 'Venice' Prozessor soll im n盲chsten Jahr auf den Markt kommen und markiert einen bedeutenden Fortschritt in AMDs Roadmap f眉r Rechenzentrums-CPUs.
- First-mover advantage in HPC with TSMC's 2nm process technology
- On-track product development for next-gen Venice EPYC processor launch
- Successful validation of 5th Gen EPYC production in US-based TSMC facility
- None.
Insights
AMD's achievement as the first HPC product taped out on TSMC's 2nm node represents a significant technological milestone in the semiconductor industry. Being an early adopter of advanced nodes provides AMD with several competitive advantages. The N2 process will likely deliver substantial improvements in transistor density, power efficiency, and performance compared to current-generation chips.
The successful bring-up (initial silicon validation) indicates the design is functional, a critical risk-reduction milestone in semiconductor development. This achievement demonstrates AMD's growing technical execution capabilities and the strength of its co-optimization strategy with TSMC. By working closely with TSMC during the design phase, AMD can better exploit the node's specific characteristics.
With Venice scheduled for launch in 2026, AMD is positioning itself to maintain competitive pressure in the data center space. The additional news about 5th Gen EPYC production at TSMC's Arizona facility highlights AMD's supply chain diversification strategy, reducing geopolitical risks while supporting U.S. semiconductor manufacturing goals.
This announcement reinforces AMD's commitment to maintaining a consistent cadence of architectural and node advancements for its server products, where margins are highest. By establishing leadership on TSMC's most advanced node, AMD continues its strategy of leveraging TSMC's manufacturing excellence while focusing on its own architectural innovations.
This milestone signals AMD's continued momentum in the data center CPU market, where technology leadership translates directly to competitive advantage. Being first to utilize TSMC's 2nm process for HPC chips positions the "Venice" EPYC processors to potentially deliver significant performance and efficiency gains when they launch next year.
The data center market highly values performance-per-watt improvements, as energy costs represent a major operational expense. Advanced nodes like N2 typically deliver substantial efficiency gains, potentially lowering the total cost of ownership for AMD-based infrastructure. This could strengthen AMD's value proposition against competitors.
The announcement also demonstrates execution consistency on AMD's roadmap, something data center customers prioritize when making long-term infrastructure decisions. By providing visibility into next-generation products, AMD helps customers plan their technology adoption cycles with greater confidence.
The domestic production of 5th Gen EPYC processors addresses growing concerns about supply chain security and resilience among enterprise and government customers. This could potentially open additional market opportunities, particularly with security-sensitive clients who value U.S.-based manufacturing.
While the financial impact won't materialize until Venice launches next year, this technical milestone reduces execution risk and reinforces AMD's position as a credible long-term technology provider in the highly competitive data center market.
鈥� Next-generation AMD EPYC CPU, codenamed 鈥淰enice,鈥� is the first HPC product to be brought up on TSMC鈥檚 next-generation N2 node 鈥�
SANTA CLARA, Calif., April 14, 2025 (GLOBE NEWSWIRE) -- (NASDAQ: AMD) today announced its next-generation AMD EPYC鈩� processor, codenamed 鈥淰enice,鈥� is the first HPC product in the industry to be taped out and brought up on the TSMC advanced 2nm (N2) process technology. This highlights the strength of AMD and TSMC semiconductor manufacturing partnership to co-optimize new design architectures with leading-edge process technology. It also marks a major step forward in the execution of the AMD data center CPU roadmap, with 鈥淰enice鈥� on track to launch next year. AMD also announced the successful bring up and validation of its 5th Gen AMD EPYC鈩� CPU products at TSMC鈥檚 new fabrication facility in Arizona, underscoring its commitment to U.S. manufacturing.
鈥淭SMC has been a key partner for many years and our deep collaboration with their R&D and manufacturing teams has enabled AMD to consistently deliver leadership products that push the limits of high-performance computing,鈥� said Dr. Lisa Su, chair and CEO, AMD. 鈥淏eing a lead HPC customer for TSMC鈥檚 N2 process and for TSMC Arizona Fab 21 are great examples of how we are working closely together to drive innovation and deliver the advanced technologies that will power the future of computing.鈥�
鈥淲e are proud to have AMD be a lead HPC customer for our advanced 2nm (N2) process technology and TSMC Arizona fab,鈥� said TSMC Chairman and CEO Dr. C.C. Wei. 鈥淏y working together, we are driving significant technology scaling resulting in better performance, power efficiency and yields for high-performance silicon. We look forward to continuing to work closely with AMD to enable the next era of computing.鈥�
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This press release contains forward-looking statements concerning Advanced Micro Devices, Inc. (AMD) such as AMD鈥檚 partnership with TSMC; next-generation AMD EPYC鈩� processors to be taped out and brought up on the TSMC advanced 2nm process technology and being on track to launch next year; AMD鈥檚 data center CPU roadmap; and 5th Gen AMD EPYC鈩� CPU products being planned for shipment later this year, which are made pursuant to the Safe Harbor provisions of the Private Securities Litigation Reform Act of 1995. Forward-looking statements are commonly identified by words such as "would," "may," "expects," "believes," "plans," "intends," "projects" and other terms with similar meaning. Investors are cautioned that the forward-looking statements in this press release are based on current beliefs, assumptions and expectations, speak only as of the date of this press release and involve risks and uncertainties that could cause actual results to differ materially from current expectations. Such statements are subject to certain known and unknown risks and uncertainties, many of which are difficult to predict and generally beyond AMD's control, that could cause actual results and other future events to differ materially from those expressed in, or implied or projected by, the forward-looking information and statements. Material factors that could cause actual results to differ materially from current expectations include, without limitation, the following: Intel Corporation鈥檚 dominance of the microprocessor market and its aggressive business practices; Nvidia鈥檚 dominance in the graphics processing unit market and its aggressive business practices; competitive markets in which AMD鈥檚 products are sold; the cyclical nature of the semiconductor industry; market conditions of the industries in which AMD products are sold; AMD鈥檚 ability to introduce products on a timely basis with expected features and performance levels; loss of a significant customer; economic and market uncertainty; quarterly and seasonal sales patterns; AMD's ability to adequately protect its technology or other intellectual property; unfavorable currency exchange rate fluctuations; ability of third party manufacturers to manufacture AMD's products on a timely basis in sufficient quantities and using competitive technologies; availability of essential equipment, materials, substrates or manufacturing processes; ability to achieve expected manufacturing yields for AMD鈥檚 products; AMD's ability to generate revenue from its semi-custom SoC products; potential security vulnerabilities; potential security incidents including IT outages, data loss, data breaches and cyberattacks; uncertainties involving the ordering and shipment of AMD鈥檚 products; AMD鈥檚 reliance on third-party intellectual property to design and introduce new products; AMD's reliance on third-party companies for design, manufacture and supply of motherboards, software, memory and other computer platform components; AMD's reliance on Microsoft and other software vendors' support to design and develop software to run on AMD鈥檚 products; AMD鈥檚 reliance on third-party distributors and add-in-board partners; impact of modification or interruption of AMD鈥檚 internal business processes and information systems; compatibility of AMD鈥檚 products with some or all industry-standard software and hardware; costs related to defective products; efficiency of AMD's supply chain; AMD's ability to rely on third party supply-chain logistics functions; AMD鈥檚 ability to effectively control sales of its products on the gray market; long-term impact of climate change on AMD鈥檚 business; impact of government actions and regulations such as export regulations, tariffs and trade protection measures; AMD鈥檚 ability to realize its deferred tax assets; potential tax liabilities; current and future claims and litigation; impact of environmental laws, conflict minerals related provisions and other laws or regulations; evolving expectations from governments, investors, customers and other stakeholders regarding corporate responsibility matters; issues related to the responsible use of AI; restrictions imposed by agreements governing AMD鈥檚 notes, the guarantees of Xilinx鈥檚 notes and the revolving credit agreement; impact of acquisitions, joint ventures and/or strategic investments on AMD鈥檚 business and AMD鈥檚 ability to integrate acquired businesses, such as ZT Systems; impact of any impairment of the combined company鈥檚 assets; political, legal and economic risks and natural disasters; future impairments of technology license purchases; AMD鈥檚 ability to attract and retain qualified personnel; and AMD鈥檚 stock price volatility. Investors are urged to review in detail the risks and uncertainties in AMD鈥檚 Securities and Exchange Commission filings, including but not limited to AMD鈥檚 most recent reports on Forms 10-K and 10-Q.
AMD, the AMD Arrow logo, EPYC and combinations thereof, are trademarks of Advanced Micro Devices, Inc. Other names are for informational purposes only and may be trademarks of their respective owners.
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Contact: Aaron Grabein AMD Communications (737) 256-9518 [email protected] Liz Stine AMD Investor Relations +1 720-652-3965 [email protected]
FAQ
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